CPE-6356 - Introduction to HDL oed answer key
Showing 61 to 80 of 100 total answers.
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Awesome StudentQuestion • Introduction to HDL
A digital multiplexer is a combinational circuit that selects ___________
Answer
One digital information from several sources and transmits the selected one
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Awesome StudentQuestion • Introduction to HDL
Output will be a LOW for any case when one or more inputs are zero for a:
Answer
AND Gate
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Awesome StudentQuestion • Introduction to HDL
Which of the following combinations of logic gates can decode binary 1101?
Answer
One 4-input AND gate, one inverter
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Awesome StudentQuestion • Introduction to HDL
In the boolean function w=f(X,Y,Z), what is the RHS referred to as ________
Answer
expression
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Awesome StudentQuestion • Introduction to HDL
How many AND gates are required to realize the following expression Y=AB+BC?
Answer
2
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Awesome StudentQuestion • Introduction to HDL
How many select lines would be required for an 8-line-to-1-line multiplexer?
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Awesome StudentQuestion • Introduction to HDL
What could be the maximum value of a single digit in an octal number system?
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Awesome StudentQuestion • Introduction to HDL
What is the indication of a short to ground in the output of a driving gate?
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Awesome StudentQuestion • Introduction to HDL
Which of the following logic expressions represents the logic diagram shown?
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Awesome StudentQuestion • Introduction to HDL
In the hexadecimal system, we allow _______ values for each digit of a number
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Awesome StudentQuestion • Introduction to HDL
A ____________ is a circuit with only one output but can have multiple inputs.
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Awesome StudentQuestion • Introduction to HDL
The output of an OR gate with three inputs, A, B, and C, is LOW when ________.
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Awesome StudentQuestion • Introduction to HDL
The Output is LOW if any one of the inputs is HIGH in case of a _________ gate.
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Awesome StudentQuestion • Introduction to HDL
The decimal value 0.5 in IEEE single precision floating point representation has
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Awesome StudentQuestion • Introduction to HDL
The general form for calculating the number of rows in a truth table is ________
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Awesome StudentQuestion • Introduction to HDL
The output of an AND gate with three inputs, A, B, and C, is HIGH when ________.
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Awesome StudentQuestion • Introduction to HDL
What is correct instruction if you want the control to go to the location 2000h?
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Awesome StudentQuestion • Introduction to HDL
How many AND, OR and EXOR gates are required for the configuration of full adder?
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Awesome StudentQuestion • Introduction to HDL